Whoever Wins the Chip War, Synopsys Profits
Don’t Buy Nvidia or AMD, Buy the Irreplaceable Compounder That Supplies Them
“Picks and shovels.” Few phrases get thrown around more carelessly in investment research — slapped onto semiconductor equipment makers, cloud providers, and data center REITs with equal enthusiasm, as if proximity to a hot theme is sufficient qualification. But the original analogy was never about proximity. It was about indispensability — supplying the one tool without which the entire enterprise grinds to a halt, regardless of who wins the underlying race.
The original analogy comes from the California Gold Rush, during which the people who reliably made money weren’t the miners gambling on striking gold — it was the merchants selling picks, shovels, and denim jeans to every miner, regardless of whether they struck it rich. The tool sellers won because someone had to buy their products, no matter the outcome of the underlying bet.
By that stricter definition, genuine picks-and-shovels businesses are quite rare. But Synopsys is one of them – fitting the label better than almost any other company in tech.
You see, whether NVIDIA is designing the next Blackwell, Apple is iterating on its A-series, or a startup is taping out its first AI accelerator, they all run through Synopsys tools. Synopsys doesn’t care which chip architecture wins, which AI model dominates, or which hyperscaler gains share. The design tools are a prerequisite for the race to even start – you cannot design a modern semiconductor without EDA software, full stop.
Furthermore, AI chips, automotive silicon, advanced packaging, chiplets, 2nm process nodes — every one of these trends requires more complex chip design, not less. Complexity is Synopsys’s best friend. As chips get harder to design, the tools become more indispensable, contracts get larger, and switching costs rise further. The gold rush analogy actually understates this: Synopsys’s picks get more valuable the more ambitious the mining operation becomes.
A miner can switch shovel brands. A chip designer cannot easily rip out their EDA toolchain. Engineers spend years building expertise in Synopsys flows; entire verification and sign-off methodologies are built around specific tools; and PDKs (process design kits) from foundries are co-developed with Synopsys. The switching cost isn’t just financial, but institutional. Decades of muscle memory and workflow integration make the relationship nearly permanent.
And there is no capital-intensive manufacturing risk, no yield risk, and no inventory risk. Just software and IP that sits at the top of the value chain. When TSMC spends $40 billion on a new fab, or Intel ramps 18A, or Samsung pushes to 2nm, the design activity that feeds those fabs runs through Synopsys. It captures the surge in demand from semiconductor investment without ever having to build a fab themselves.
It is a brilliant business in a sublime position in the semiconductor value chain – a business truly selling the picks and shovels, the software without which semiconductor design comes to a halt.
But I assume some of you might not be entirely familiar with Synopsys, so let me quickly provide some background.
The core of the business is best explained this way: when engineers design a microchip, they’re working with billions of transistors that must be perfectly arranged and connected, and this is increasingly complex. Doing this by hand is impossible. Synopsys makes software tools (called EDA—Electronic Design Automation) that let engineers design, simulate, test, and verify chips on a computer before a single chip is ever physically manufactured. Every major chip company in the world — TSMC, NVIDIA, Apple, Intel, Qualcomm — relies on Synopsys tools to design their products. As chips get more complex (more transistors, smaller nodes, AI workloads), the design tools become more valuable and harder to replace.
In simple terms, you can see EDA software as the complete toolkit engineers use to design a chip from scratch. Engineers start by describing what the chip should do, typically in a hardware description language. EDA tools translate that abstract description into an actual circuit design. Later in the process, before a chip is manufactured, you need to be certain it actually does what you designed it to do. EDA verification tools simulate and test the design exhaustively, running billions of test scenarios to catch bugs.
Then there is signoff, the final check before manufacturing. EDA signoff tools verify that the physical design meets all foundry-defined manufacturing rules, checking that wires aren’t too close together, that the chip will survive real-world conditions, and that it meets power and timing requirements. No foundry will manufacture a chip unless it passes sign-off. Finally, EDA tools also assist the foundry itself in the physical manufacturing process, including computational lithography, essentially calculating how light behaves when etching the circuit pattern onto silicon.
Each of these phases is essentially non-optional and runs sequentially, meaning a chip designer is embedded in Synopsys tools from the first line of code to the moment the design is sent to the fab.
Crucially, Synopsys isn’t just a competitor in the EDA market, but it holds the #1 position. With the addition of Ansys, Synopsys claims a mid-to-high-thirties market share in EDA, sitting well ahead of Cadence in the low-thirties. Add Siemens to the mix, with a low-teens market share, and the big three control some 80-85% of the market, with Synopsys and Cadence practically operating a duopoly.
In addition, Synopsys has a broad portfolio of semiconductor IP, which are prebuilt, pretested building blocks that chipmakers license and integrate into their designs (USB controllers, memory interfaces, security blocks, etc.). Here, Synopsys holds a 25-30% market share, making it the #2 player in semiconductor IP globally, trailing only ARM Holdings. Notably, Synopsys has been gaining market share at an impressive rate in recent years, up from just 13% in 2015.
Also, it is worth understanding a key difference between ARM and Synopsys: ARM’s dominance is concentrated in processor IP, the CPU and GPU cores that power devices. Synopsys dominates a different category — interface and foundation IP, including the PCIe controllers, USB blocks, memory interfaces, and SerDes that every chip needs, regardless of what processor core it uses. In that specific sub-market, Synopsys’s position is considerably stronger –it is the #1. This means these two barely compete but dominate their own sub-segments.
Crucially, both the EDA and IP markets are expected to keep growing at a strong rate, creating a promising outlook for Synopsys.
Synopsys expects its EDA TAM to grow at an 11% CAGR through 2030, in line with broader estimates, driven by increasing complexity of integrated circuit designs, the rapid evolution of AI- and ML-based EDA tools, growing demand for edge and high-performance computing chips, and increasing cloud adoption. Meanwhile, the semiconductor IP market should grow at a 9-11% CAGR.
The combination creates a solid base for Synopsys to deliver double-digit growth in the medium-term. And going by recent years, Synopsys is likely to outpace both markets through market share gains, especially in IP.
Also, absolutely worth pointing out, the combination of subscription-based EDA software and IP licensing means 75-80% of Synopsys’ revenue is recurring and very reliable. Take the fact that it has only reported three quarters of negative growth over the last 15 years.
And all of this also comes with a significant moat.
Most importantly, switching costs are effectively prohibitive. Entire design methodologies, verification flows, signoff processes, and internal libraries are built around specific Synopsys products over years, sometimes decades. The engineers are trained on them. The institutional knowledge is encoded in them. You’d be asking a company to retrain hundreds or thousands of engineers, rebuild every internal flow from scratch, re-qualify with foundries, and accept massive schedule risk on products worth hundreds of millions of dollars. The cost of switching vastly exceeds any conceivable savings from a competing tool.
Furthermore, Synopsys doesn’t just sell tools; it co-develops process design kits directly with foundries like TSMC, Samsung, and Intel Foundry for each new process node. When TSMC certifies a new 2nm node, Synopsys tools are validated against it from day one. Their IP is silicon-proven on that node before most customers even start designing. This means Synopsys is embedded in the foundry’s own infrastructure. A chip designer using TSMC N2 isn’t just choosing Synopsys — they’re inheriting the Synopsys integration that TSMC itself built. That’s a moat reinforced by a third party on Synopsys’s behalf, at massive scale, continuously.
And this is practically a duopoly, which eliminates any competitive pressure. The complexity of modern EDA tools, the depth of foundry integration required, and the breadth of IP needed to serve customers across every node and application make meaningful new entry essentially impossible. Consider what a challenger would need: billions in R&D investment, decades of tool refinement, simultaneous certification across TSMC, Samsung, and Intel Foundry, a silicon-proven IP catalog spanning thousands of blocks, and the willingness to sell at a loss for years to pry customers away from embedded workflows they’ll never voluntarily abandon. This is why even big tech or industry giants like Nvidia and TSMC can’t disrupt Synopsys.
Quite an attractive business, right? Synopsys is one of the highest-quality, most reliable, and highly promising yet underdiscussed businesses in the sector.
I last covered Synopsys back in December 2025. Since then, plenty has happened, including an impressive quarterly report last week, which saw shares sell off by 9%. So, today, I want to update my view and thesis on Synopsys by reviewing its recent performance and financials before updating my financial framework and valuation model.
Without further ado, let’s delve in!
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Financial & Performance Review
Synopsys released its latest financial results – fiscal Q2 2026 – just last week, on May 27, and the company delivered an impressive report, exceeding guidance on revenue, operating margin, and EPS, beating the consensus by a healthy margin, and raising the FY26 outlook.
Let’s break down the numbers.
Synopsys reported total Q2 revenue of $2.28 billion, beating the consensus by $30 million and up 42% YoY. However, it is important to note that Synopsys completed the acquisition of Ansys late last year, so this 42% growth isn’t organic; it includes $652 million in Ansys revenue, growing mid-teens, that wasn’t there last year. Excluding this, Synopsys’ core business was up just 1% YoY organically, which looks worse than it is. The poor organic growth is the result of divestitures, headwinds in China, struggles at Intel, and an overhaul of the IP portfolio, offset by strong AI-driven demand.
Starting with the Design Automation segment, revenue was up 63% YoY to $1.82 billion, or up 4% excluding Ansys. However, Synopsys also divested its Optical Solutions Group in Q4, so after adjusting for this, revenue was up about 6-8% organically, which is a solid performance, especially amid lingering China headwinds.
As a reminder, Synopsys faced a 6-week export ban imposed by the U.S. government on its operations in China in 2025. While this period didn’t significantly impact the business, the effects continue to linger due to changes in customer behavior. Simply, Chinese customers are hesitant to sign a large EDA contract with Synopsys, given their awareness of the risk of new restrictions that could significantly impact their chip development. The implications of losing access to Synopsys systems halfway through the chip development process would be detrimental, so this caution makes sense. And this headwind remains, although to a lesser extent than H2 2025.
The solid organic performance in Q1 was driven by robust AI-driven design activity and sustained demand for advanced node and 3DIC solutions. This drove a solid 8% growth in EDA revenue, with strength in hardware-assisted verification solutions, as hyperscalers and semiconductor customers are scaling emulation and prototyping for increasingly complex AI designs.
AI is a significant long-term tailwind for Synopsys, as it scales semiconductor demand, architectural diversity, and complexity of both chips and the systems they power. Simply, this boosts semiconductor design intensity, which requires more sophisticated EDA tools.
Crucially, AI chips — GPUs, TPUs, NPUs, custom silicon from hyperscalers — are among the most complex semiconductors ever designed. They pack hundreds of billions of transistors, run at bleeding-edge process nodes, and require thousands of engineer-years of design work. Every step of that design work runs through Synopsys tools. More AI chips being designed means more tool seats, larger contracts, longer engagement cycles, and faster adoption of premium verification and signoff tools.
Moreover, five years ago, chip design was concentrated among a relatively small set of traditional semiconductor companies. Today, every major hyperscaler is designing its own custom AI silicon. This dramatically expands the global universe of active chip design programs. Each of these new entrants needs EDA tools, needs to license interface IP, and needs verification and signoff infrastructure, significantly expanding Synopsys’ TAM.
Clearly, Synopsys will benefit from this AI boom. And Synopsys is cementing its position in this shifting market through new capabilities, including Multiphysics Fusion, GPU-accelerated computing, and AI-driven automation. Take Multiphysics Fusion. Early results show this new technology drives significant productivity gains in the design process, “including up to 3x faster design closure with higher ECO success rates and up to 2x faster turnaround times for complex analog designs compared to traditional flows,” to quote management. The software will be rolled out commercially in the second half of the year.
These kinds of innovations are driving incremental results for Synopsys. Management indicated that GPU-accelerated EDA is seeing strong monetization so far, driving both increased customer value and contract uplift. In other words, these innovations drive higher contract value, driving growth within Synopsys’ existing customer base.
On a final note, the integration of Ansys is well underway. The acquisition has strengthened Synopsys’ competitive position by extending its reach into system-level design and multiphysics simulation, enabling a more integrated solution. Furthermore, it extends Synopsys’ reach to a broader portfolio of customers beyond semis, including aerospace and defense, grid infrastructure, and automotive, to which it can then also cross-sell its core solutions.
I have addressed this in greater detail in my prior coverage, but I like the acquisitions and addition of Ansys products to the Synopsys portfolio – the move makes a lot of sense and has the potential to create excellent long-term value, significantly enhancing Synopsys’ competitive position and its TAM.
Ultimately, I am quite pleased by the performance and recent developments in the Design Automation segment, which generates 80% of group revenue. Granted, I have been more impressed with Cadence’s deal momentum recently, including deals with Samsung, TSMC, Google, and Nvidia, as well as its strong relationship with Broadcom, but Synopsys’ competitive position is strong, the AI tailwind is structural, the Ansys integration is tracking well, and recent product announcements look good, with promising initial results.
Let’s then move to Design IP. Here, Synopsys continues to show struggles, as expected. IP revenue in Q2 was $454 million, down 6% YoY.
The lasting poor performance here is the result of two primary coinciding headwinds. First of all, IP also suffers from weaker Chinese demand. Chinese customers have historically been significant IP licensees, so restrictions-driven caution is currently proving a drag on growth, with customers still slightly hesitant.
However, the far more important and largest drag on growth is Synopsys’ deliberate, ongoing, and significant shift in resources away from lower-value, standalone IP blocks toward more complex, higher-value offerings such as subsystems — pre-integrated combinations of IP blocks that a customer can drop into their design as a complete functional unit — and chiplet-ready IP optimized for die-to-die interconnects and advanced packaging – a move that absolutely makes sense in the long run.
You see, standalone interface IP blocks are increasingly commoditized. Customers know exactly what they want, they compare vendor offerings on specs and price, and the value Synopsys can capture per engagement is limited. Subsystems and chiplet IP are the opposite. They require deep integration expertise, foundry-specific optimization, and silicon validation that only a handful of vendors can credibly deliver. Synopsys is essentially moving up the value chain within its own IP business, accepting lower transaction volume in exchange for higher value per engagement and stronger customer stickiness.
Ultimately, these higher-value subsystem and chiplet IP contracts mean larger deal sizes, better margins, and stronger customer lock-in. The royalty model layered on top means that as AI chip volumes scale and hyperscalers ship millions of units embedding Synopsys IP, revenue becomes increasingly volume-driven and self-compounding, with no proportional incremental cost.
Again, I like this move upmarket, which improves the long-term position.
However, it does create a near-term drag. Standalone IP blocks are relatively quick to license and deliver. A customer licenses a PCIe controller, integrates it, ships the chip, and Synopsys collects the fee. The cycle is fast, and revenue recognition is clean.
Yet, subsystems and chiplet IP are more complex engagements. They require more customization, longer qualification cycles, deeper co-development with the customer, and, in many cases, tie revenue recognition to delivery milestones rather than upfront license fees. The sales cycle is longer, the contracts are larger, but the revenue takes longer to flow through the income statement. You’re essentially trading quick, smaller transactions for slower, larger ones, which creates a temporary growth gap as the portfolio transitions.
The evolution of the royalty model compounds this. As Synopsys shifts customers toward volume-linked royalties on top of upfront licensing, there’s an initial period during which the royalty stream hasn’t yet ramped up to replace the deferred upfront fees. The royalty revenue only materializes once chips are in mass production, which can be 18-24 months after the design is completed. Hence, the significant drag on growth.
Positively, Q2 marked a 12% sequential improvement in IP revenue, and management indicates it is through the bottom, with expectations for sequential growth throughout the year and improved momentum. The company sees accelerating demand for its high-speed interconnect IP, driven by AI, with PCIe 7.0 IP achieving a win rate greater than 90%, including 18 new licenses and a growing pipeline. Furthermore, management sees the shift to multi-die and chiplet architectures driving demand for die-to-die interoperability, securing new UCIe design wins in Q2, bringing the total to 150 so far.
So, good momentum overall. Nonetheless, IP growth will remain muted in 2026, likely only returning to positive growth by Q4.
What also helps here, at least in the medium-term, is improved execution and a return to growth for Intel. You see, Synopsys has historically always had a close relationship with Intel. Intel has long been one of Synopsys’s largest customers, often accounting for a mid-teens percentage of revenue, with Intel licensing substantial amounts of interface IP (PCIe, USB, memory controllers, etc.) from Synopsys.
As a result, when Intel went through its prolonged downturn, cutting R&D spend, delaying process nodes, and shrinking headcount, it directly pressured Synopsys’s EDA IP revenue. Fewer active chip design projects at Intel means fewer IP licenses.
However, Intel has shown improvement in recent times, with complex design programs at 18A and beyond finding traction, for which Synopsys provides the vast majority of IP, an investment that only pays off if Intel starts shipping those chips at volume. Furthermore, Intel is back to revenue growth, backed by the U.S. government and Nvidia, it is joining Musk’s Terafab chip complex in Austin, Texas, to help design, fabricate, and package ultra-high-performance chips for SpaceX, xAI and Tesla, it has multiple customers actively evaluating the 14A technology, showing better traction than 18A, and it has a new collaboration with Nvidia, which will be using Intel’s 18A and 14A nodes in the future.
These are absolutely promising developments for Synopsys. Simply, if Intel performs better and its foundry business gains traction, Synopsys is a huge beneficiary through IP royalties.
Alright, making up the balance so far, it is safe to say Synopsys’ numbers are a bit mixed, given the interference from divestitures, China headwinds, and the IP reorganization. But I am pleased to see the core EDA business perform well, helped by AI momentum; Ansys’ integration is progressing steadily; and the IP business is showing improving momentum. Meanwhile, the Synopsys thesis remains unchanged despite near-term headwinds, improving with a stronger competitive position in EDA from the addition of Ansys and better positioning in IP, driven by a shift in portfolio focus and an Intel turnaround.
Ultimately, Synopsys outperformed expectations and is showing good underlying momentum.
With that, let’s move to the P&L.
Synopsys reported total GAAP costs and expenses of $2.16 billion, higher than expected due to the timing of restructuring costs, amounting to just over $400 million in Q2. Non-GAAP expenses, which better reflect the underlying business performance by excluding one-offs, came in at $1.38 billion, below guidance, reflecting improved efficiency and early synergies. This translates to a Q2 operating margin of 39.5%, up 150 bps YoY.
Further down the line, the high restructuring costs put pressure on the GAAP EPS, which came in at only $0.09, including a $2.10 headwind from these one-off costs. Also, this includes some SBC, which sat at just under 10% of revenue, which is a little high for my taste, but alright.
Meanwhile, excluding restructuring costs and SBC, the non-GAAP EPS was $3.35, beating the consensus by $0.19.
Finally, Synopsys reported a solid Q2 FCF of $575 million, reflecting a 25% FCF margin. This brings the TTM total to $2.6 billion at a 30% FCF margin, which is the highest in years.
These healthy cash flows enabled management to further improve the balance sheet, which had become quite leveraged following the blockbuster acquisition of Ansys. To fund the deal, Synopsys issued over $14 billion in debt in 2025, moving the balance sheet from $3.4 billion in net cash at the end of fiscal 2024 to $11.3 billion in net debt at the end of 2025.
Positively, management has been able to quickly reduce the debt pile in recent quarters, having already reduced net debt by $3 billion, thanks to these healthy cash flows. As a result, Synopsys ended Q2 with $2.5 billion in cash and roughly $10 billion in long-term debt, which is absolutely manageable given the business’s FCF-generative nature.
Ultimately, Synopsys remains in solid financial health. Restructuring costs are clouding margins, but excluding these one-offs that should ease over time, the margin profile looks good, showing improvement.
On that, let’s address the outlook!
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Outlook & Valuation
Following a strong first 6 months of the fiscal year, a promising product roadmap, and positive market signals, management raised the full-year outlook for revenue, operating margin, EPS, and FCF.
Starting with revenue, the better-than-expected performance in H1 gave management confidence to raise the revenue guidance by $35 million at the midpoint to a range of $9.625 billion to $9.705 billion. This includes a $40 million headwind from the divestiture of the Processor IP Solutions business and a $60 million positive impact from an accounting change in the Ansys business. The accounting change is accompanied by an equivalent increase in expenses, so the bottom-line impact is neutral. In total, Ansys will contribute an estimated $2.96 billion, consistent with prior guidance.
Moving to the P&L, the Ansys accounting change will drive a $60 million increase in non-GAAP operating expenses, but this will be more than offset by cost discipline and accelerating synergies. Management is roughly halfway through its committed cost synergies for fiscal 2026, so well on track. Ultimately, this results in non-GAAP operating expenses between $5.675 billion and $5.725 billion, with a 41% operating margin at the midpoint, up 50 bps from previous guidance.
This should translate into a non-GAAP EPS of $14.72 to $14.80 per share, a $0.34 increase at the midpoint from prior guidance, and FCF of roughly $2 billion, up $100 million from prior guidance, driven by improved operating cash flow and unchanged CapEx.
Overall, that is a solid hike in guidance, putting it right around my expectations from back in December, with EPS comfortably ahead of it, thanks to synergies realized ahead of what I anticipated.
Looking further ahead, Synopsys’ outlook remains promising. As pointed out earlier, current forecasts indicate high-single-digit to low-double-digit growth in the underlying EDA and Design IP markets, which provides a solid backdrop, possibly even a cautious one if AI momentum holds up, boosting design activity and IP demand.
Meanwhile, I believe Synopsys is well-positioned to deliver even better growth, given its dominant market position, stronger competitive position in EDA with Ansys, a well-reformed IP portfolio, and a potential positive impact from Intel’s growth.
Another promising factor worth pointing out is Synopsys’s partnership with ARM to produce ARM’s AGI CPU for data centers. Synopsys provides a good share of EDA software, interface IP, and hardware-assisted verification during the process. And given the market ARM is targeting with this product and the long-term roadmap announced, this could provide a solid tailwind to growth, especially in IP.
Bringing this all together, I believe Synopsys can absolutely realize a low-teens growth rate into the 2030s. For reference, management targets double-digit EDA revenue growth in the medium term and mid-teens IP revenue growth.
Additionally, management sees its operating margin improve to the mid-40s and its FCF margin to the mid-30s, driven by improved efficiency and synergies. Ultimately, this should allow for high-teens EPS growth in normalized conditions through 2030, creating a very compelling outlook.
Turning to my own projections, I now expect Synopsys to deliver FY26 revenue of $9.7 billion, up 38% YoY and at the high end of management’s updated guidance, given the strong business momentum, the durability of the AI boom, and the improving momentum in the IP business. I believe management’s guidance still includes a good level of conservatism.
On the bottom line, synergies are tracking ahead of expectations so far, so I have raised my EPS estimate to reflect 15% YoY growth, which is well below revenue growth due to the low-margin contribution from Ansys and a higher tax rate.
Looking ahead, I believe Synopsys is well-positioned to deliver fairly consistent low-teens growth in the 11-14% range through 2030, with upside potential given its exposure to Intel and the ARM AGI CPU. Also, given current AI momentum and the repositioned IP portfolio, I wouldn’t be surprised if Synopsys could grow toward the mid-teens in a more optimistic scenario. Meanwhile, I expect Synopsys to deliver strong margin gains over the same period, driven by continued synergies and operating leverage, tracking closer to the targeted mid-40s by 2029. This should allow EPS and FCF to grow in the mid-to-high teens.
These assumptions are all reflected in the updated financial forecast below.
That then brings me to valuation, and given the sharp recovery in the share price from a late-March low, shares aren’t as attractive as they have been recently. On the other hand, this 30% share price recovery hasn’t happened without reason – the company delivered strong results, AI momentum seems here to stay, Intel’s turnaround is huge, and the Ansys integration is progressing ahead of expectations.
In other words, the thesis has become more compelling in recent months, so the price run-up seems justified. And, honestly, shares still don’t seem overly expensive. At a current price of $465, shares trade at:
31.5x 2026 earnings, compared to a 33-34x 10-year median.
A PEG of 1.8x.
32x 2026 FCF, compared to a 10-year median of 33.5x.
Synopsys has always traded at a solid premium to the sector, and rightfully so. This is one of the highest-quality names in the sector, absolutely deserving of a premium, and that remains the case today. I mean, it has a near-impenetrable duopoly position in EDA, its mission-critical software is embedded in the workflows of virtually every major semiconductor company on earth, and it generates 75-80% of its revenue as recurring, with almost no capital intensity. As a result, revenue growth is extremely reliable through the cycles – customers simply can’t cut Synopsys products in a downturn – and it generates high margins and excellent cash flows.
And this business has a strong track record of mid-teens growth over the past decade, and I don’t expect that to change anytime soon, thanks to AI, design activity, and semiconductor complexity all driving a growing need for EDA software and IP.
What is there not to like? Paying 31.5x earnings or 32x FCF for this combination of reliability, growth, and promise is easily justified.
Meanwhile, the company today arguably looks better than ever, given the addition of Ansys, the repositioning of its IP portfolio upmarket, and EDA’s increasing importance. In recent times, near-term noise from China, Intel, and the IP transition has created a perception of mediocrity around a business that is anything but.
In other words, Synopsys trading just shy of historical multiples may again be more expensive than in recent times, but it is absolutely justified, in my opinion.
But, with shares having revalued over recent months, is it still a compelling buy for long-term investors?
Say we use a 32x (earnings) 2028 exit multiple, which seems fair (applying a small discount to the 10-year median on the forecasted future profits, despite the company being better positioned than ever), I calculate an end-of-2028 target price of $665. Based on a current price of $508, this implies annualized returns of just over 15%, which tops my 15% threshold and indicates a compelling risk-reward profile.
At this time, I put my fair value estimate at $465, implying that shares now trade marginally below my fair value, given the 8%+ share price loss over the last two trading sessions.
Ultimately, I am extremely bullish on Synopsys as an investment for the next decade, especially amid the AI boom, the Intel turnaround, and the involvement in the new ARM data center CPU, which can all absolutely generate significant upside to current estimates through 2030. Therefore, I view last week’s price weakness as a compelling entry point to carefully pick up some shares again. If shares were to drop closer to $430 again, I would be buying more aggresively.
Rating + fair value: Buy — Accumulate below $465
2028 Target Price: $665
Implied CAGR from current price: ~11%








I think you are trapped by your picks and shovels analogy. SNPS has all the risks of the AI boom and few of the benefits. Let me explain.
A better analogy would be that on the eve of WWII, you’re buying a business selling uniforms to generals and admirals. There’s specialization, it’s more secure, whatever. Here’s the key point: while the armed forces will increase the number of generals and admirals in a linear fashion, the number of soldiers and sailors will increase in an exponential fashion.
Yes, SNPS gets new business when, say, Amazon designs a new processor. That’s growing SNPS revenue in a linear fashion. That revenue doesn’t grow significantly if that chip sweeps the market and ships by the millions (it’s only the IP revenue that has a royalty component).
In contrast, TSMC makes money on every wafer. AMAT makes money on every new production line needed to make it. SK Hynix makes money on every gig of ram sold to equip that processor. And so on.
“Uniforms for the generals” vs “uniforms for the soldiers”.
You tout SNPS selling for 32X FCF and growing revenue organically at 8%. Compare that to, say, NVDA, at 22X FCF and expected to grow revenue at 60%.
If the AI boom goes bust, both will crater. The risk/reward ratio is out of whack for SNPS, in comparison to other players in the AI boom.
One of the biggest beneficiaries of the next phase of physical AI and agentic AI.
And currently trading at its widest historical discount vs. $CDNS.